Thyristors and Controlled Rectifiers¶

Book-grounded regeneration picture

Splitting the inner junctions gives a PNP transistor whose collector drives the NPN base and an NPN transistor whose collector drives the PNP base. Gate current starts the loop; increasing collector currents reinforce one another until the anode current is self-sustaining. The gate can trigger turn-on but cannot normally force a conducting SCR off.

Source figure: Boylestad/Nashelsky, Electronic Devices and Circuit Theory (11th ed.), PDF p. 875.

Exam-ready answer

An SCR (silicon-controlled rectifier) is a unidirectional, latching power switch with four alternating semiconductor layers \(p_1n_1p_2n_2\), three junctions and terminals anode A, cathode K and gate G. A is connected to \(p_1\), K to \(n_2\), and G to the inner \(p_2\) layer near the cathode.

Operating States¶

1. Reverse blocking: with A negative relative to K, \(J_1\) and \(J_3\) are reverse biased. Only reverse leakage flows until reverse breakdown, which is normally destructive.
2. Forward blocking: with A positive and \(I_G=0\), \(J_1,J_3\) are forward biased but central \(J_2\) is reverse biased. The SCR blocks up to forward breakover \(V_{BO}\), apart from leakage.
3. Forward conduction: a positive gate pulse injects carriers into \(p_2\). The equivalent PNP/NPN pair regenerates: each transistor's collector drives the other's base. \(J_2\) loses its blocking action and the device snaps to a low on-state voltage, typically about \(1\)–\(2\,\text{V}\).

Increasing gate current reduces the forward voltage needed for turn-on. Immediately after triggering, anode current must rise above the latching current \(I_L\) before the gate pulse is removed. Once latched, the gate cannot turn the SCR off; conduction continues while \(I_A>I_H\), where holding current \(I_H<I_L\). Turn-off requires current below \(I_H\) for the specified turn-off time: naturally at AC current zero or by forced commutation in DC circuits.

Triggering methods:

• Gate triggering: a rated positive \(G\)-to-\(K\) current pulse; this is the normal controllable method.
• Forward breakover: raise \(V_{AK}\) to \(V_{BO}\); avoided in normal service because avalanche stresses the device.
• \(dv/dt\) triggering: junction capacitance current \(i=C_jdv/dt\) can start regeneration; an RC snubber limits it.
• Light (LASCR), temperature or radiation may also generate carriers, but unintended thermal triggering is a hazard.

Important ratings/protection: repetitive peak forward- and reverse-blocking voltages \(V_{DRM},V_{RRM}\); average/RMS/surge on-state current; gate trigger current/voltage \(I_{GT},V_{GT}\); \(I_L,I_H\); maximum \(dv/dt\), \(di/dt\) and junction temperature. A series inductance limits turn-on \(di/dt\) because conduction initially occupies a small junction area; a snubber limits false \(dv/dt\) turn-on; heat sinking keeps \(T_j\) within rating.

Check: if a gate pulse produces \(I_A=30\,\text{mA}\) while \(I_L=25\,\text{mA}\), the device remains on after the pulse. If load current later falls below, for example, \(I_H=10\,\text{mA}\) for sufficient time, it turns off. This distinguishes latching from holding current.

SCRs control rectifiers, heaters, lamp dimmers and motor drives. They handle high power with low on loss, but conduct only one direction and lack gate turn-off capability.

Practice target: 18 minutes; draw the structure and V-I curve, explain all three regions, regeneration, triggering, latching/holding and four key ratings.

Exam-ready answer

The SCR's \(p_1n_1p_2n_2\) layers can be separated into a PNP transistor \(T_1\) and an NPN transistor \(T_2\). The collector of each drives the base of the other, forming a positive-feedback loop; the gate injects current into the base region of \(T_2\).

Let common-base gains be \(\alpha_1,\alpha_2\) and collector leakage currents be \(I_{CBO1},I_{CBO2}\). Then

Since the anode current supplies the two cross-coupled collector/base paths, \(I_A=I_{C1}+I_{C2}\). Hence

Initially \(\alpha_1+\alpha_2<1\), so only leakage flows. A gate pulse increases \(T_2\) current; its collector drives \(T_1\), whose collector then supplies still more \(T_2\) base current. As current rises, both gains rise and

making the denominator very small. The ideal equation suggests unbounded current, but the external load and transistor saturation limit it: physically both transistors switch hard on. After regeneration, internal collector currents replace the gate drive, so the SCR latches. It remains on after \(I_G\) is removed provided \(I_A>I_L\) initially and later \(I_A>I_H\); otherwise regeneration collapses and it returns to blocking.

Practice target: 8 minutes; draw the cross-coupling, derive the current equation and explain why the mathematical singularity means saturation/latching, not infinite current.

Exam-ready answer

A rectifier converts AC to unidirectional voltage. For periodic output \(v_o(\theta)\),

The RMS AC ripple component is \(V_{ac}=\sqrt{V_{rms}^2-V_{dc}^2}\), hence

Ideal rectification efficiency is

and PIV is the greatest reverse voltage that a nonconducting diode must withstand.

For a centre-tapped full-wave rectifier, PIV is \(2V_m\) per diode when \(V_m\) is the peak of one half-secondary. Real diode drops and winding resistance reduce \(V_{dc}\) and efficiency; a filter lowers load ripple but changes diode-current pulses and transformer utilisation.

Practice target: 8 minutes; derive both ripple factors from the RMS/DC values and keep bridge PIV distinct from centre-tapped PIV.

Exam-ready answer

A full-wave bridge rectifier uses four diodes to reverse the negative input half-cycle at the load, so load current always has the same polarity. It needs no centre-tapped transformer.

For ideal diodes, \(v_o=V_m|\sin\theta|\). Therefore

Two diodes conduct in series, so a practical silicon bridge has approximately \(v_o\approx |v_s|-2V_D\) whenever \(|v_s|>2V_D\). Compared with a centre-tapped full-wave circuit, the bridge uses the whole secondary on both half-cycles, has better transformer utilisation and only \(V_m\) diode PIV, but incurs two forward drops instead of one. A capacitor or LC filter may smooth the pulsating DC, followed by regulation.

Check: for \(V_m=20\,\text{V}\), ideal \(V_{dc}=40/\pi=12.73\,\text{V}\) and every diode should be rated safely above \(20\,\text{V}\) reverse voltage, with margin for surges.

Practice target: 8 minutes; draw and label both conduction paths, then derive average voltage, ripple frequency and diode PIV.

Exam-ready answer

A controlled rectifier replaces rectifier diodes with SCRs so a gate delay controls the fraction of each AC cycle delivered to the load. Let \(v_s=V_m\sin\theta\), where \(\theta=\omega t\), and let firing angle \(\alpha\) be measured from the natural zero crossing.

For a half-wave circuit with a purely resistive load, the forward-biased SCR remains off from \(0\) to \(\alpha\). A gate pulse at \(\alpha\) turns it on; current \(i_o=v_s/R\) then flows from \(\alpha\) to \(\pi\). At \(\pi\), current naturally reaches zero and falls below \(I_H\), so the SCR commutates off. It is reverse biased throughout the negative half-cycle.

Thus

and the cycle average is

It reduces from \(V_m/\pi\) at \(\alpha=0\) to zero at \(\alpha=\pi\).

In a single-phase full-wave bridge with an R load, diagonal SCR pairs are fired at \(\alpha\) and \(\pi+\alpha\). The two positive load-voltage segments each last from firing to the following supply zero:

twice the half-wave value, with ripple frequency \(2f\).

A different formula applies to a fully controlled bridge with a sufficiently inductive load and continuous current. Each pair conducts for \(\pi\) radians and output may become negative during part of the cycle, giving

This distinction is essential: \(V_m(1+\cos\alpha)/\pi\) is the discontinuous R-load result, while \(2V_m\cos\alpha/\pi\) is the continuous-current full-converter result.

Numerical check: for \(V_m=325\,\text{V}\) and \(\alpha=60^\circ\), half-wave R-load average is \(325(1+0.5)/(2\pi)=77.6\,\text{V}\); full-wave R-load average is \(155.2\,\text{V}\). Under continuous current, the full converter gives \(2(325)(0.5)/\pi=103.5\,\text{V}\).

Increasing \(\alpha\) lowers output and worsens input power factor/harmonics. Full-wave operation gives greater average output and lower ripple than half-wave. Applications include controlled DC drives, battery chargers, heaters and HVDC converters; gate isolation, snubbers, fuses and heat sinks are required in practice.

Practice target: 18 minutes; draw both circuits/waveforms, derive the half-wave integral and state the two full-wave load-dependent formulas without mixing them.