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Error Detection and Correction

Possible Exam Questions

Exam Questions and Answer Map

Evidence note: [PYQ paper/year] = exact question observed in that past paper; [likely] = pattern-predicted variant not confirmed as an exact PYQ.

  1. Differentiate error detection and error correction. Explain single-bit and burst errors. [5] — [likely]
  2. Answer plan: Define a codeword and redundancy -> distinguish detection from locating/correcting -> define single-bit error -> define burst length from first to last corrupted bit -> state causes and typical remedies.
  3. Model answer: Detection, Correction and Error Types

  4. Explain parity, two-dimensional parity/LRC and checksum error detection. [5] — [likely]

  5. Answer plan: Give even/odd parity XOR equation and odd/even error capability -> explain row/column parity and single-error location -> describe one's-complement word addition and receiver all-ones test.
  6. Model answer: Parity, LRC and Checksum

  7. Explain CRC generation and checking. Calculate the CRC for data \(1101011011\) using generator \(10011\). [10] — [likely]

  8. Answer plan: Represent data and generator as polynomials -> append four zeros -> perform modulo-2 long division -> obtain remainder \(1110\) -> transmit \(11010110111110\) -> verify zero receiver remainder -> state burst-detection properties.
  9. Model answer: CRC Generation, Long Division and Checking

  10. Define Hamming distance and derive the detection/correction conditions in terms of \(d_{min}\). [5] — [likely]

  11. Answer plan: Define distance as differing bit positions -> define minimum distance -> state \(d_{min}\geq s+1\) to detect \(s\) errors and \(d_{min}\geq2t+1\) to correct \(t\) -> explain non-overlapping correction spheres.
  12. Model answer: Hamming Distance and Code Capability

  13. Explain Hamming \((7,4)\) code with a complete encoding and single-bit correction example. [10] — [likely]

  14. Answer plan: Derive \(2^r\geq m+r+1\) -> place parity at positions 1,2,4 -> encode data 1011 as 0110011 using even parity -> introduce an error at position 5 -> calculate syndrome 101 -> flip bit 5 and recover data.
  15. Model answer: Hamming (7,4) Encoding and Correction

  16. Compare Forward Error Correction and Automatic Repeat Request. Explain Stop-and-Wait, Go-Back-N and Selective Repeat ARQ. [10] — [likely]

  17. Answer plan: Define FEC and ARQ -> compare redundancy, delay, feedback and applications -> explain ACK/NAK, timeout and sequence number -> summarize the three retransmission windows.
  18. Model answer: FEC and ARQ Protocols

1. Error Fundamentals

A digital channel may change transmitted bits because of thermal noise, impulse noise, interference, fading, attenuation, timing error or intersymbol interference.

Let a channel encoder map \(k\) information bits to an \(n\)-bit codeword. The added \(n-k\) bits are redundancy used to identify or repair invalid received patterns.

Error-control hierarchy showing detection methods, forward error correction and ARQ
Fig: Error-control hierarchy showing detection methods, forward error correction and ARQ

Error Detection vs Correction

Function Result Receiver action
Error detection Determines that the received word is not a valid/expected word Discard, flag or request retransmission
Error correction Locates the most likely error pattern and recovers a valid codeword Correct locally without retransmission

No finite code can guarantee correction of an unlimited number of arbitrary errors. Every code has a designed error capability.

Error Types

Single-Bit Error

Exactly one bit in a data unit changes from 0 to 1 or from 1 to 0.

Sent:      10110110
Received:  10100110
               ^ one corrupted bit

Multiple Random Errors

Several separated bit positions are corrupted in one codeword or frame.

Burst Error

A burst extends from the first corrupted bit to the last corrupted bit. Its burst length includes any correct bits between those endpoints.

Sent:      110101001011
Received:  110011111011
              <---->       burst length 5

Burst errors are common on channels affected by impulse noise, deep fades and synchronization loss. CRC and interleaved block codes are particularly useful against bursts.


2. Redundancy and Code Rate

For an \((n,k)\) block code:

\[ \boxed{R_c=\frac{k}{n}} \]

where \(R_c\) is the code rate. Lower code rate means more redundancy and potentially stronger protection, but also more bandwidth or lower net information rate.

The receiver does not know the transmitted word directly. It uses the algebraic structure of valid codewords to decide whether the received word is plausible and, for a correcting code, which valid word is nearest.


3. Parity and LRC

Single Parity Bit

For data bits \(D_0,D_1,\ldots,D_{m-1}\), an even-parity bit is:

\[ \boxed{P_e=D_0\oplus D_1\oplus\cdots\oplus D_{m-1}} \]

An odd-parity bit is its complement:

\[ \boxed{P_o=\overline{P_e}} \]

At the receiver, XOR of all bits is the parity syndrome.

Capability

  • Detects every odd number of bit errors, including every single-bit error.
  • Misses any error pattern containing an even number of bit flips.
  • Cannot locate or correct an error by itself.
  • Adds only one bit per protected unit.

It is incorrect to say that parity detects only one-bit errors; it detects any odd count, but provides no guarantee for even counts.

Two-Dimensional Parity / LRC

Arrange data in rows and columns. Add a parity bit to each row and a parity row across columns. The column parity is often called a Longitudinal Redundancy Check (LRC).

\(C_1\) \(C_2\) \(C_3\) \(C_4\) Row parity
\(R_1\) 1 0 1 1 1
\(R_2\) 0 1 1 0 0
\(R_3\) 1 1 0 0 0
Column parity 0 0 0 1 1

If one data bit flips, exactly one row check and one column check fail; their intersection locates the bit and permits correction. Some multiple-bit patterns remain undetected, especially rectangular patterns with even changes in every affected row and column.


4. Checksum

A checksum treats data as fixed-width words rather than individual bits. Internet-style checksums use one's-complement arithmetic.

Transmitter Procedure

  1. Divide the data into \(n\)-bit words.
  2. Add them using one's-complement addition.
  3. Add any carry beyond bit \(n\) back into the LSB (end-around carry).
  4. Complement the final sum and transmit it as the checksum.

Receiver Procedure

Add all received data words and the checksum using the same arithmetic. An all-ones result indicates that no error was detected.

Worked 8-Bit Example

Word 1       AA_hex = 10101010
Word 2       66_hex = 01100110
Raw sum               1 00010000
End-around carry        00010001 = 11_hex
Word 3       3C_hex   + 00111100
Final sum                01001101 = 4D_hex
Checksum = complement    10110010 = B2_hex

Receiver check:

\[ AA_{16}+66_{16}+3C_{16}+B2_{16}=FF_{16} \]

Checksums are easy in software and detect many common errors, but a well-designed CRC has stronger guaranteed burst-error properties.


5. Cyclic Redundancy Check (CRC)

CRC interprets a binary bit string as coefficients of a polynomial over \(GF(2)\), where addition and subtraction are both XOR.

Let:

  • \(D(x)\) = data polynomial.
  • \(G(x)\) = agreed generator polynomial of degree \(r\).
  • \(R(x)\) = division remainder with degree less than \(r\).
  • \(T(x)\) = transmitted codeword polynomial.

Encoding

Append \(r\) zeros, divide \(D(x)x^r\) by \(G(x)\) using modulo-2 division, and append the \(r\)-bit remainder:

\[ \boxed{R(x)=\operatorname{rem}\left[\frac{D(x)x^r}{G(x)}\right]} \]
\[ \boxed{T(x)=D(x)x^r+R(x)} \]

Because subtraction equals addition in \(GF(2)\), \(T(x)\) is exactly divisible by \(G(x)\).

CRC encoding and checking flow from data and generator division to receiver remainder
Fig: CRC encoding and checking flow from data and generator division to receiver remainder

Receiver Check

Divide the received polynomial by the same \(G(x)\):

  • Zero remainder -> no error detected.
  • Nonzero remainder -> detected corruption.

A zero remainder does not prove that no error occurred; it means any error pattern present is a multiple of \(G(x)\) and is therefore undetected.

Worked CRC Division

Given:

Data D        = 1101011011
Generator G   = 10011       (degree r = 4)

Append four zeros:

Dividend      = 11010110110000

Perform XOR long division. XOR only when the current leftmost dividend bit is 1:

At position 0: 11010 XOR 10011 = 01001
At position 1: 10011 XOR 10011 = 00000
At position 6: 10110 XOR 10011 = 00101
At position 8: 10100 XOR 10011 = 00111

The final four bits are:

\[ \boxed{R=1110} \]

Therefore the transmitted codeword is:

\[ \boxed{T=1101011011\,1110} \]

Receiver verification:

11010110111110 divided by 10011 -> remainder 0000

Detection Properties

For a suitable degree-\(r\) generator:

  • Every burst of length \(\leq r\) is detected.
  • Many generators detect all single-bit errors.
  • If \(G(x)\) contains factor \((x+1)\), every odd number of bit errors is detected.
  • A primitive/appropriately chosen generator can detect all two-bit errors within a specified frame length.
  • For random longer bursts, the approximate undetected fraction is \(2^{-r}\).

These claims depend on generator choice; degree alone does not guarantee every listed property.


6. Hamming Distance and Code Capability

The Hamming distance between equal-length words is the number of positions in which they differ.

Example:

101100
100110
  ^^       distance = 2

The minimum distance \(d_{min}\) of a code is the smallest distance between any two distinct valid codewords.

Detection Condition

To transform one valid codeword into another requires at least \(d_{min}\) changes. Therefore a code can guarantee detection of up to \(s\) errors if:

\[ \boxed{d_{min}\geq s+1} \]

Equivalently, guaranteed detection capability is \(s_{max}=d_{min}-1\).

Correction Condition

To correct \(t\) errors, the radius-\(t\) neighborhoods around valid codewords must not overlap:

\[ \boxed{d_{min}\geq2t+1} \]

Thus:

\[ \boxed{t_{max}=\left\lfloor\frac{d_{min}-1}{2}\right\rfloor} \]

Hamming \((7,4)\) has \(d_{min}=3\), so it corrects one error or detects up to two errors when used only for detection. Standard SEC Hamming decoding should not claim reliable simultaneous double-error detection unless an overall parity bit is added.


7. Hamming Code

Hamming code is a linear block code designed for single-error correction.

Number of Parity Bits

For \(m\) data bits and \(r\) parity bits, there are \(m+r\) possible single-bit error positions plus the no-error condition. The \(r\)-bit syndrome must distinguish all of them:

\[ \boxed{2^r\geq m+r+1} \]

For \(m=4\), \(r=3\) is sufficient because \(2^3=8\geq4+3+1\).

Bit Placement

Parity bits occupy power-of-two positions \(1,2,4,8,\ldots\); data bits occupy the remaining positions.

Hamming 7,4 layout with parity bits at positions 1, 2 and 4 and parity-check coverage
Fig: Hamming 7,4 layout with parity bits at positions 1, 2 and 4 and parity-check coverage
Position 1 2 3 4 5 6 7
Symbol \(P_1\) \(P_2\) \(D_1\) \(P_4\) \(D_2\) \(D_3\) \(D_4\)

For even parity:

  • \(P_1\) checks positions 1, 3, 5, 7.
  • \(P_2\) checks positions 2, 3, 6, 7.
  • \(P_4\) checks positions 4, 5, 6, 7.

Complete Hamming (7,4) Encoding Example

Encode data \(D_1D_2D_3D_4=1011\):

Position 1 2 3 4 5 6 7
Initial \(P_1\) \(P_2\) 1 \(P_4\) 0 1 1

Using even parity:

\[ P_1\oplus D_1\oplus D_2\oplus D_4=0 \]
\[ P_1\oplus1\oplus0\oplus1=0\Rightarrow P_1=0 \]
\[ P_2\oplus D_1\oplus D_3\oplus D_4=0 \]
\[ P_2\oplus1\oplus1\oplus1=0\Rightarrow P_2=1 \]
\[ P_4\oplus D_2\oplus D_3\oplus D_4=0 \]
\[ P_4\oplus0\oplus1\oplus1=0\Rightarrow P_4=0 \]

The transmitted codeword is:

\[ \boxed{0110011} \]

Single-Bit Error Correction

Suppose bit 5 flips during transmission:

\[ 0110011\rightarrow0110111 \]

Recalculate parity checks:

\[ S_1=b_1\oplus b_3\oplus b_5\oplus b_7=0\oplus1\oplus1\oplus1=1 \]
\[ S_2=b_2\oplus b_3\oplus b_6\oplus b_7=1\oplus1\oplus1\oplus1=0 \]
\[ S_4=b_4\oplus b_5\oplus b_6\oplus b_7=0\oplus1\oplus1\oplus1=1 \]

Read the syndrome as \(S_4S_2S_1\):

\[ \boxed{S=101_2=5_{10}} \]

The receiver flips bit 5, restoring \(0110011\), then extracts positions 3, 5, 6 and 7 to recover data \(1011\).

SECDED Extension

Adding one overall parity bit to Hamming code produces SECDED: Single-Error Correction, Double-Error Detection. The ordinary Hamming syndrome identifies a single-bit location, while the overall parity distinguishes single from double errors.


8. Forward Error Correction (FEC) and ARQ

Forward Error Correction

The transmitter sends enough structured redundancy for the receiver to correct errors without asking for another copy.

Examples:

  • Hamming and BCH block codes.
  • Reed-Solomon codes.
  • Convolutional codes.
  • Turbo and LDPC codes.

FEC is essential when round-trip delay is large, feedback is unavailable or continuous real-time delivery matters, such as satellite, broadcast and deep-space links.

Automatic Repeat Request (ARQ)

ARQ combines error detection with feedback, sequence numbers, acknowledgements and timeout. A damaged or missing frame is retransmitted.

Method Operation Main trade-off
Stop-and-Wait Send one frame and wait for ACK; timeout/NAK causes retransmission Simple but inefficient on long-delay links
Go-Back-N Send a window; on error, retransmit the failed frame and all later unacknowledged frames Simple receiver, may repeat correct frames
Selective Repeat Buffer a window and retransmit only missing/damaged frames Highest efficiency, greater buffering/control complexity

FEC vs ARQ

Feature FEC ARQ
Feedback required No Yes
Added redundancy Usually greater Detection bits plus retransmitted frames
Delay Predictable decoding delay Variable; may be large after retransmission
Best channel Broadcast, real-time, high-delay Reliable two-way links with moderate delay
Residual errors Possible beyond correction capability Very low after repeated valid delivery

Many modern systems use Hybrid ARQ, combining FEC with selective retransmission.


9. Key Exam Points

Key Exam Points - Error Detection and Correction

  • Single parity detects any odd number of errors and misses even-count patterns.
  • Two-dimensional parity can locate one erroneous bit from the failed row/column intersection.
  • A checksum uses word addition; CRC uses polynomial division over \(GF(2)\).
  • CRC codeword: \(T(x)=D(x)x^r+R(x)\); the valid receiver remainder is zero.
  • For data \(1101011011\) and generator \(10011\), the CRC remainder is \(1110\).
  • Detection: \(d_{min}\geq s+1\); correction: \(d_{min}\geq2t+1\).
  • Hamming parity positions are powers of two; \(2^r\geq m+r+1\).
  • In Hamming \((7,4)\), syndrome \(S_4S_2S_1\) gives the erroneous bit position.
  • FEC corrects locally; ARQ detects and retransmits. Hybrid ARQ combines both.

Model Answer — Error Detection, Correction and Error Types [5 marks]

Exam-ready answer

A channel code maps \(k\) information bits into an \(n\)-bit codeword. The extra \(n-k\) redundant bits create structure by which a receiver can recognize or repair corrupted words; its code rate is \(R_c=k/n\).

Error-control hierarchy separating detection, FEC and retransmission methods
Fig: Error-control hierarchy separating detection, FEC and retransmission methods

Error detection decides that a received word/frame is invalid or inconsistent, but need not identify the changed bit. The receiver then flags or discards it, or requests retransmission. Parity, checksum and CRC are common examples. Error correction uses enough redundancy to locate the most likely error pattern and recover a valid codeword locally, as in Hamming, BCH or LDPC coding. Correction is limited by the code's minimum distance; no finite code corrects arbitrarily many changes.

A single-bit error changes exactly one position. For example, \(10110110\rightarrow10100110\) changes bit 4 under left-to-right numbering. It may arise from an isolated noise impulse or a wrong threshold decision.

A burst error extends from the first corrupted bit through the last corrupted bit; correct bits lying between them still count in the burst length. For example,

Word Bits
Sent 1 1 0 1 0 1 0 0 1 0 1 1
Received 1 1 0 0 1 1 1 1 1 0 1 1

The first and last changes span five positions, so the burst length is 5 even if not all five bits changed. Bursts are typical of impulse noise, fading, synchronization loss and intersymbol interference. Interleaving converts adjacent channel errors into separated codeword errors; CRC is strong for burst detection, while FEC or ARQ supplies recovery. The selected remedy depends on delay, feedback availability and required residual error rate.

Practice target: 8 minutes; define codeword/redundancy, contrast receiver action, and give one indexed example of each error type.

Model Answer — Parity, Two-Dimensional Parity/LRC and Checksum [5 marks]

Exam-ready answer

These methods add redundant check information but differ in whether they operate on individual bits, a bit matrix or fixed-width words.

Position of parity, checksum and other detection methods in the error-control hierarchy
Fig: Position of parity, checksum and other detection methods in the error-control hierarchy

Single parity: for data \(D_0,\ldots,D_{m-1}\), an even-parity bit is

\[ \boxed{P_e=D_0\oplus D_1\oplus\cdots\oplus D_{m-1}}, \]

and odd parity uses \(P_o=\overline{P_e}\). The receiver XORs all data and parity bits. Even parity expects syndrome 0. It detects every odd number of flips, including one bit, but misses every even-count pattern and cannot locate/correct an error by itself. For data \(1011\), three ones require \(P_e=1\), giving code \(10111\) with four ones.

Two-dimensional parity/LRC: arrange words as rows, append one parity bit per row, then append a parity row across columns; column parity is the longitudinal redundancy check. One changed data bit makes exactly one row and one column fail, so their intersection locates and can correct that bit. It detects many bursts, but a rectangular four-bit pattern with an even number of changes in every affected row/column can pass all checks.

Checksum: divide data into \(n\)-bit words, add them using one's-complement arithmetic, wrap each carry beyond bit \(n\) back into the LSB, complement the final sum, and transmit it. The receiver adds all words including the checksum; an all-ones result means no error was detected. With 8-bit words \(AA_{16},66_{16},3C_{16}\), end-around-carry addition gives \(4D_{16}\), so the checksum is \(\overline{4D}_{16}=B2_{16}\) and the receiver sum is \(FF_{16}\). A checksum is efficient in software and detects many patterns, but lacks the strong generator-dependent burst guarantees of a well-chosen CRC.

Practice target: 9 minutes; write the XOR law, show the failed-row/column intersection, and complete one end-around-carry checksum.

Model Answer — CRC Generation, Long Division and Checking [10 marks]

Exam-ready answer

A cyclic redundancy check (CRC) treats a bit string as polynomial coefficients over \(GF(2)\). Addition and subtraction are XOR, so there are no carries or borrows. Let data be \(D(x)\), generator \(G(x)\) of degree \(r\), and remainder \(R(x)\) with degree below \(r\).

CRC transmitter division, appended remainder and receiver zero-remainder check
Fig: CRC transmitter division, appended remainder and receiver zero-remainder check

The transmitter appends \(r\) zeros, divides \(D(x)x^r\) by \(G(x)\) and appends the \(r\)-bit remainder:

\[ \boxed{R(x)=\operatorname{rem}\!\left[\frac{D(x)x^r}{G(x)}\right]}, \qquad \boxed{T(x)=D(x)x^r+R(x)}. \]

Because plus and minus are identical in \(GF(2)\), \(T(x)\) is divisible by \(G(x)\). The receiver divides the entire received word by the same generator: nonzero remainder means detected error; zero means only that no detectable error pattern was found.

Given \(D=1101011011\) and \(G=10011\). The generator has five bits, so \(r=4\) and the augmented dividend is

\[ 1101011011\,0000. \]

Modulo-2 long division XORs \(10011\) only under a current leading 1:

Leading position from left Current five-bit window XOR with \(10011\) Result in that window
0 11010 10011 01001
1 10011 10011 00000
6 10110 10011 00101
8 10100 10011 00111

Positions with leading 0 require only a shift. After the final allowable shift, the four unprocessed low-order bits are

\[ \boxed{R=1110}. \]

Thus the transmitted systematic codeword is

\[ \boxed{T=1101011011\,1110}. \]

A receiver division gives

\[ 11010110111110\div10011\longrightarrow\boxed{0000}, \]

confirming that the uncorrupted codeword is a multiple of the generator. If one channel bit flips, the received polynomial becomes \(T(x)+E(x)\); the syndrome is the remainder of \(E(x)/G(x)\).

For a suitably chosen degree-\(r\) generator, every burst of length at most \(r\) is detected and the undetected fraction of random longer bursts is approximately \(2^{-r}\). All single-bit errors are detected when \(G(x)\) has more than one nonzero term; all odd-count errors are detected if \((x+1)\) is a factor. Guaranteed two-bit capability also depends on generator order and frame length. Therefore degree alone does not justify every CRC claim, and a zero remainder does not prove an error-free frame: an error polynomial that is a multiple of \(G(x)\) is undetected.

Practice target: 18–20 minutes; write the polynomial rule, show every nonzero XOR window, box remainder/codeword, and finish with qualified detection properties.

Model Answer — Hamming Distance and Code Capability [5 marks]

Exam-ready answer

The Hamming distance \(d(\mathbf{x},\mathbf{y})\) between equal-length binary words is the number of positions in which they differ, equivalently the Hamming weight of \(\mathbf{x}\oplus\mathbf{y}\). For example,

\[ d(101100,100110)=2. \]

The minimum distance \(d_{min}\) of a block code is the smallest distance between any two distinct valid codewords. It determines how close the codewords are in the \(n\)-dimensional binary space.

Hamming (7,4) positions illustrating a distance-three single-error-correcting code
Fig: Hamming (7,4) positions illustrating a distance-three single-error-correcting code

To turn one valid codeword into another requires at least \(d_{min}\) bit changes. Hence every pattern of at most \(s\) errors is guaranteed detectable provided it cannot reach another valid word:

\[ \boxed{d_{min}\geq s+1},\qquad s_{max}=d_{min}-1. \]

For correction, decode to the nearest codeword. Radius-\(t\) error spheres around different codewords must not overlap. Since their centers are \(d_{min}\) apart,

\[ 2t<d_{min} \quad\Rightarrow\quad \boxed{d_{min}\geq2t+1}, \qquad t_{max}=\left\lfloor\frac{d_{min}-1}{2}\right\rfloor. \]

Thus a repetition code with valid words \(000\) and \(111\) has \(d_{min}=3\): it detects up to two flips or corrects one by majority decision. Hamming \((7,4)\) also has \(d_{min}=3\), so it is a single-error-correcting code. Although distance three permits double-error detection when used only as a detector, an ordinary decoder that assumes at most one error may miscorrect a double error; adding overall parity gives SECDED for reliable single correction plus double detection.

Practice target: 8–9 minutes; define distance by XOR, derive both inequalities geometrically, and test them on one distance-three code.

Model Answer — Hamming (7,4) Encoding and Single-Bit Correction [10 marks]

Exam-ready answer

Hamming \((7,4)\) is a linear block code carrying \(m=4\) data bits and \(r=3\) parity bits. To identify the no-error case plus each of \(m+r\) possible single-bit positions, parity bits must satisfy

\[ \boxed{2^r\geq m+r+1}. \]

Here \(2^3=8=4+3+1\). Parity bits occupy power-of-two positions 1, 2 and 4; data occupy 3, 5, 6 and 7.

Hamming 7,4 parity positions and the bit sets checked by P1, P2 and P4
Fig: Hamming 7,4 parity positions and the bit sets checked by P1, P2 and P4

For even parity, \(P_1\) checks positions \(1,3,5,7\) (binary index LSB 1), \(P_2\) checks \(2,3,6,7\), and \(P_4\) checks \(4,5,6,7\).

Encode data \(D_1D_2D_3D_4=1011\). Place it as

Position 1 2 3 4 5 6 7
Symbol/value \(P_1\) \(P_2\) 1 \(P_4\) 0 1 1

The even-parity equations give

\[ P_1\oplus1\oplus0\oplus1=0\Rightarrow P_1=0, \]
\[ P_2\oplus1\oplus1\oplus1=0\Rightarrow P_2=1, \]
\[ P_4\oplus0\oplus1\oplus1=0\Rightarrow P_4=0. \]

Therefore

\[ \boxed{\mathbf{c}=0110011}. \]

Single-error example: suppose position 5 changes from 0 to 1, so the receiver gets \(\mathbf{r}=0110111\). Recalculate the parity checks:

\[ S_1=b_1\oplus b_3\oplus b_5\oplus b_7 =0\oplus1\oplus1\oplus1=1, \]
\[ S_2=b_2\oplus b_3\oplus b_6\oplus b_7 =1\oplus1\oplus1\oplus1=0, \]
\[ S_4=b_4\oplus b_5\oplus b_6\oplus b_7 =0\oplus1\oplus1\oplus1=1. \]

Read the syndrome in order \(S_4S_2S_1\):

\[ \boxed{S=101_2=5_{10}}. \]

The binary syndrome directly names the erroneous position. Flip bit 5 to restore \(0110011\), then extract positions \(3,5,6,7\) to recover \(1011\). Syndrome \(000\) means no error detected under the assumed model.

Hamming \((7,4)\) has \(d_{min}=3\) and corrects one arbitrary bit error. A plain single-error decoder can miscorrect two errors, so an eighth overall parity bit is added for SECDED when simultaneous single correction and guaranteed double-error detection are required. The code rate is \(4/7\), illustrating the bandwidth/redundancy cost of local correction.

Practice target: 18–20 minutes; derive the parity-bit count, fill the seven positions, calculate all three parity bits and decode a nonzero syndrome.

Model Answer — FEC and Stop-and-Wait, Go-Back-N, Selective-Repeat ARQ [10 marks]

Exam-ready answer

Error control either adds enough redundancy for local repair or retransmits a frame that fails an error-detection check.

Error-control hierarchy showing FEC and the ARQ retransmission branch
Fig: Error-control hierarchy showing FEC and the ARQ retransmission branch

Forward Error Correction (FEC): the transmitter sends a structured \((n,k)\) code of rate \(R_c=k/n\). The decoder uses syndrome, distance or soft information to correct errors without feedback. Hamming, Reed-Solomon, convolutional, turbo and LDPC codes are examples. FEC gives predictable latency and is essential for broadcast, real-time, satellite/deep-space and links with unavailable/slow feedback. Its costs are continuous redundancy, decoder complexity and residual errors beyond code capability.

Automatic Repeat Request (ARQ): each frame carries a detection code, normally CRC, plus a sequence number. The receiver sends ACK for accepted data or NAK for detected damage; loss is inferred by timeout. Retransmission can make residual error very low on a two-way channel, but delay and throughput vary with errors and round-trip time.

Method Sender/receiver operation Strength Limitation
Stop-and-Wait Send one numbered frame, stop for ACK; timeout/NAK repeats it Simplest control and one-frame buffering Link idle during each round trip
Go-Back-N (GBN) Sender pipelines a window; receiver normally accepts only next in-order frame and sends cumulative ACK Simple receiver, good when errors are rare One loss repeats failed frame and all later unacknowledged frames
Selective Repeat (SR) Receiver buffers valid out-of-order frames and ACKs them individually; sender repeats only missing/damaged frames Best efficiency on noisy/long-delay links More memory, timers and reorder logic

With \(m\) sequence bits, a conventional GBN sender window is at most \(2^m-1\) frames. Selective Repeat normally limits sender/receiver windows to at most \(2^{m-1}\) so an old frame cannot be confused with a new one after sequence-number wrap.

Worked protocol example: frames 0, 1, 2 and 3 are sent in a window and frame 1 is lost. Stop-and-Wait could not have sent 2 or 3 yet. In GBN, the receiver rejects/out-of-order-handles 2 and 3 according to the protocol and the sender retransmits 1, 2 and 3 after timeout/cumulative feedback. In SR, the receiver buffers 2 and 3 and the sender retransmits only frame 1; delivery resumes in order when 1 arrives.

Ignoring ACK transmission time and errors, Stop-and-Wait utilization is approximately

\[ \eta\approx\frac{T_f}{T_f+2T_p} =\frac{1}{1+2a},\qquad a=\frac{T_p}{T_f}, \]

where \(T_f\) is frame transmission time and \(T_p\) one-way propagation delay. This assumption-dependent equation shows why pipelined GBN/SR are valuable on long-delay links.

Feature FEC ARQ
Feedback Not required Required
Cost Redundancy in every codeword CRC/control plus retransmitted traffic
Delay Mostly fixed decoding delay Variable, may exceed deadline
Best fit Broadcast, high delay, real time Interactive reliable two-way links

Hybrid ARQ combines both: FEC corrects typical errors and retransmission handles blocks that still fail CRC.

Practice target: 18–20 minutes; draw the feedback path, compare all three windows with one lost-frame example, and state sequence-number limits.

Mind Map